IDT74SSTV16857 Overview
The SSTV16857 is a 14-bit registered buffer designed for 2.3V-2.7V VDD and supports low standby operation. All data inputs and outputs are SSTL_2 level patible with JEDEC standard for SSTL_2. RESET is an LVCMOS input since it must operate predictably during the power-up phase.
IDT74SSTV16857 Key Features
- Available in TSSOP package
IDT74SSTV16857 Applications
- Ideally suited for DIMM DDR registered applications