IDT74SSTVF16859 Datasheet PDF - IDT 13-BIT TO 26-BIT REGISTERED BUFFER Specs

IDT74SSTVF16859 - 13-BIT TO 26-BIT REGISTERED BUFFER

Datasheet Summary

Description

APPLICATIONS: Along with CSPT857C, Zero Delay PLL Clock buffer, provides complete solution for DDR1 DIMMs FUNCTIONAL BLOCK DIAGRAM 51 RESET CLK CLK 48 49 VREF D1 45 35 1D C1 R 32 Q1B 16 Q1A TO 12 OTHER CHANNELS COMMERCIAL TEMPERATURE RANGE 1 c 2003 Integrated Device Technology

Features

1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859 2.3V to 2.7V Operation for PC1600, PC2100, and PC2700 2.5V to 2.7V Operation for PC3200 SSTL_2 Class I style data inputs/outputs Differential CLK input RESET control compatible with LVCMOS levels Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0).
Available in 56 pi.

Datasheet Details

Part number	IDT74SSTVF16859
Manufacturer	IDT
File Size	93.26 KB
Description	13-BIT TO 26-BIT REGISTERED BUFFER
Datasheet	IDT74SSTVF16859 Datasheet
Additional preview pages of the IDT74SSTVF16859 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com IDT74SSTVF16859 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O COMMERCIAL TEMPERATURE RANGE 13-BIT TO 26-BIT REGISTERED BUFFER WITH SSTL I/O IDT74SSTVF16859 FEATURES: • • • • • • • • • 1:2 register buffer Meets or exceeds JEDEC standard SSTVF16859 2.3V to 2.7V Operation for PC1600, PC2100, and PC2700 2.5V to 2.7V Operation for PC3200 SSTL_2 Class I style data inputs/outputs Differential CLK input RESET control compatible with LVCMOS levels Latch-up performance exceeds 100mA ESD >2000V per MIL-STD-883, Method 3015; >200V using machine model (C = 200pF, R = 0) • Available in 56 pin VFQFPN and 64 pin TSSOP packages The SSTVF16859 is a 13-bit to 26-bit registered buffer designed for 2.3V-2.7V VDD for PC1600 - PC2700 and 2.5V-2.

Published: Dec 28, 2006 |