IDT85304-01 Description
The IDT85304-01 is a low skew, high performance 1-to-5 differential-to3.3V LVPECL clock generator-divider. It has two selectable clock inputs. The CLK/ xCLK pair can accept most standard differential input levels.
IDT85304-01 Key Features
- Five differential 3.3V LVPECL outputs
- Selectable differential CLK, xCLK, or LVPECL clock inputs
- CLK, xCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, and HCSL
- PCLK, xPCLK supports the following input types: LVPECL, CML, and SSTL
- Maximum output frequency: 650MHz
- Translates any single-ended input signal to 3.3V LVPECL levels with resistor bias on xCLK input
- Output skew: 35ps (max.)
- Part-to-part skew: as low as 150ps
- Propagation delay: 2.1ns (max.)
- 3.3V operating supply