IDT8P34S1102I Datasheet Text
1:2 LVDS Output 1.8V Fanout Buffer
IDT8P34S1102I
Datasheet
Description
The IDT8P34S1102I is a high-performance differential LVDS fanout buffer. The device is designed for the fanout of high-frequency, very low additive phase-noise clock and data signals.
The IDT8P34S1102I is characterized to operate from a 1.8V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8P34S1102I ideal for those clock distribution applications demanding well-defined performance and repeatability. One differential input and two low skew outputs are available. The integrated bias voltage reference enables easy interfacing of single-ended signals to the differential device input. The device is optimized for low power consumption and low additive phase noise.
Features
- Two low skew, low additive jitter LVDS output pairs
- One differential clock input pair
- Differential CLK, nCLK pairs can accept the following differential input levels: LVDS, CML
- Maximum...