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IDT8T73S208I - LVPECL Clock Divider and Fanout Buffer

Datasheet Summary

Description

The IDT8T73S208I is a high-performance differential LVPECL clock divider and fanout buffer.

The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks.

The IDT8T73S208I is characterized to operate from a 2.5V and 3.3V power supply.

Features

  • One differential input reference clock.
  • Differential pair can accept the following differential input levels: LVDS, LVPECL, CML.

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Datasheet preview – IDT8T73S208I

Datasheet Details

Part number IDT8T73S208I
Manufacturer IDT
File Size 1.19 MB
Description LVPECL Clock Divider and Fanout Buffer
Datasheet download datasheet IDT8T73S208I Datasheet
Additional preview pages of the IDT8T73S208I datasheet.

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Full PDF Text Transcription

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2.5V, 3.3V Differential LVPECL Clock IDT8T73S208I Divider and Fanout Buffer DATA SHEET General Description The IDT8T73S208I is a high-performance differential LVPECL clock divider and fanout buffer. The device is designed for the frequency division and signal fanout of high-frequency, low phase-noise clocks. The IDT8T73S208I is characterized to operate from a 2.5V and 3.3V power supply. Guaranteed output-to-output and part-to-part skew characteristics make the IDT8T73S208I ideal for those clock distribution applications demanding well-defined performance and repeatability. The integrated input termination resistors make interfacing to the reference source easy and reduce passive component count.
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