IN24LC16B Overview
U 4 t m o .c TECHNICAL DATA w w a t a is a 16K bit Electrically Erasable PROM. The chip is organized as eight blocks of 256 x 8 bit The IN24LC16B D memory with a 2-wire serial interface. Low voltage design permits operation down to 2.5 volts with standby.
IN24LC16B Key Features
- Single supply with operation down to 2.5V
- Low power CMOS technology
- 1 mA active current typical
- 10 µA standby current typical at 5.5V
- 5 µA standby current typical at 3.0V
- Organized as 8 blocks of 256 bytes (8 x 256 x 8)
- 2-wire serial interface bus, I2C patible
- Schmitt trigger inputs for noise suppression
- Output slope control to eliminate ground bounce
- 100 kHz (E-temp) and 400 kHz (C/I-temp) patibility