Datasheet Summary
TECHNICAL DATA
Quad D Flip-Flop with mon Clock and Reset
High-Performance Silicon-Gate CMOS
The IN74HC175A is identical in pinout to the LS/ALS175. The device inputs are patible with standard CMOS outputs; with pullup resistors, they are patible with LS/ALSTTL outputs. This device consists of four D flip-flops with mon Reset and Clock inputs, and separate D inputs. Reset (active-low) is asynchronous and occurs when a low level is applied to the Reset input. Information at a D input is transferred to the corresponding Q output on the next positivegoing edge of the Clock input.
- Outputs Directly Interface to CMOS, NMOS, and TTL
- Operating Voltage Range: 2.0 to 6.0...