FEATURES
Two fully programmable serial 1/0 . 512K BAUD ) channels (DC TO Tri-state TTL drive capabilities for bi-directional data bus and control bus on each channel Loopback control for communications link fault isolation for each UART Line break generation and detection for each UART Complete status reporting capabilities Generation and stripping of serial asynchronous data control bits (start ,stop parity ) Programmable baud rate generator and modem control signals for each channel Fully prioritized independent interrupt system controls for each channel 16byte FIFO buffers on both transmit and receive of each channel to reduce number of interrupts presented to the CPU Programmable FIFO threshold loves of 1,4,8,or 14,bytes on each channel Two modes of DMA signaling available for transfer of data characters to and from FIFO buffers Fully bi-directional centronics compatible parallel port direct printer interface Advanced CMOS low power technology with single +5voit supply 68-pin PLCC...
IMP Inc
