PZ5032-10A44
Overview
This report describes a construction analysis of the Philips PZ5032-10A44 32 macrocell CPLD. Five devices packaged in 44-pin Plastic Leaded Chip Carriers (PLCCs) were received for the analysis.
- Twin-well CMOS process in an N substrate (no epi).
- Sub-micron gate lengths (0.35 micron N-channel and 0.4 micron P-channel).
- Tungsten plugs used under all metal layers. 1These items present possible quality or reliability concerns. They should be discussed with the manufacturer to determine their possible impact on the intended application. -1Free Datasheet
