CS6257 Datasheet | ISSI

DESCRIPTION CS6257 is a 32-Bit MCU with embedded Flash designed for motor control applications. The CPU is MIPS-X core with enhanced DSP instructions and accelerator and can run up to 125MHz. There are on-chip 64KB SRAM and embedded 128KB Flash memory. The flash memory is accessed through a cache controller which is shared with external SPI flash memory controller. This external SPI flash memory can be used to further expand the program and data memory space. bining the CPU and flexible memory structure, CS6257 provide a powerful puting platform and execution unit for various motor control requirements. The motor controller consists of a 16-bit programmable counter which drives three synchronous 16-bit PWM channels. The counter also includes six pointers to trigger ADC synchronization and software interrupt. Each channel of PWM has two outputs that control upper and lower driver of the motor winding. There are flexible controls of these outputs including polarity, default drive level, as well as dead time control of rising and falling edges individually. The overload detection and protection circuits can accept external inputs or the output of analog parators for activation of protection. Coupled closely with the motor controller are a fast 12Bit pipeline ADC. The ADC has a conversion rate of 1Mbps and has 3 channels of Track and Hold as frontend. There are also 3 pairs of analog parators with programmable threshold that can be used for current and phase detection of the drive currents. Other on-chip peripherals include another 8-channel 12Bit SAR ADC, I2C controller, UART/LIN interface, and SPI controller, and CAN controller. These interfaces share the connection with GPIO ports of the CPU. The GPIO ports also can be used for external interrupt. CS6257 also includes power-on reset circuits and lowvoltage detecting circuit. The embedded flash controller has built-in protection to prevent data and program loss by accidents. It also handles code security to protect...