Description
The serial electrical interface follows the industry-standard serial peripheral interface (SPI), providing a cost-effective non- volatile memory storage solution in systems where pin count must be kept to a minimum.
Features
- Flexible & Efficient Memory Architecture
- Organization: - Memory Cell Array: (128M + 4M) x 8bit - Data Register: (2K + 64) x 8bit - Page Size: (2K + 64) Byte - Block Erase: (128K + 4K) Byte - Memory Cell: 1bit/Memory Cell.
- Efficient Read and Program modes
- Support SPI-Mode 0 and SPI-Mode 3 - Bus Width: x1, x2(1), x4
- Command Register Operation - NOP: 4 cycles - OTP Operation
- Bad-Block-Protect
- Boot Read.
- Highest performance - Frequency : 104MHz - Internal ECC Implementati.