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IS42S32400E - 128Mb SYNCHRONOUS DRAM

General Description

A0-A11 Row Address Input A0-A7 Column Address Input BA0, BA1 Bank Select Address DQ0 to DQ31 Data I/O CLK System Clock Input CKE Clock Enable CS Chip Select RAS Row Address Strobe Command CAS Column Address Strobe Command 86 VSS 85 DQ15 84 VSSQ 83 DQ14 82 DQ

Key Features

  • Clock frequency: 166, 143, 133 MHz.
  • Fully synchronous; all signals referenced to a positive clock edge.
  • Internal bank for hiding row access/precharge.
  • Single Power supply: 3.3V + 0.3V.
  • LVTTL interface.
  • Programmable burst length.
  • (1, 2, 4, 8, full page).
  • Programmable burst sequence: Sequential/Interleave.
  • Auto Refresh (CBR).
  • Self Refresh.
  • 4096 refresh cycles every 16ms (A2 grade) or 6.

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📁 Similar Datasheet

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Other Datasheets by ISSI (now Infineon)

Part Number Description
IS42S32400F 4M x 32 128Mb SYNCHRONOUS DRAM
IS42S32160D 512Mb SDRAM
IS42S32160F 512Mb SDRAM
IS42S32200 512K Bits x 32 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42S32200E SYNCHRONOUS DYNAMIC RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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IS42S32400E IS45S32400E 4M x 32 128Mb SYNCHRONOUS DRAM NOVEMBER 2010 FEATURES • Clock frequency: 166, 143, 133 MHz • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access/precharge • Single Power supply: 3.3V + 0.