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IS42VM32160D - 4M x 32Bits x 4Banks Mobile Synchronous DRAM

General Description

These IS42/45VM32160D are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits.

These products are offering fully synchronous operation and are referenced to a positive edge of the clock.

Key Features

  • JEDEC standard 1.8V power supply.
  • Auto refresh and self refresh.
  • All pins are compatible with LVCMOS interface.
  • 8K refresh cycle / 64ms.
  • Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full Page for Sequential Burst - 4 or 8 for Interleave Burst.
  • Programmable CAS Latency : 2,3 clocks.
  • All inputs and outputs referenced to the positive edge of the system clock.
  • Data mask function by DQM.
  • Internal 4 banks operat.

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Full PDF Text Transcription for IS42VM32160D (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for IS42VM32160D. For precise diagrams, and layout, please refer to the original PDF.

IS42/45VM32160D 4M x 32Bits x 4Banks Mobile Synchronous DRAM Description These IS42/45VM32160D are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4...

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obile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features  JEDEC standard 1.

More Datasheets from ISSI (now Infineon)

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