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IS61DDB24M18C Datasheet 72mb Ddr-ii Cio Synchronous Sram

Manufacturer: ISSI (now Infineon)

Overview: IS61DDB24M18C IS61DDB22M36C 4Mx18, 2Mx36 72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM APRIL.

General Description

The 72Mb IS61DDB22M36C and IS61DDB24M18C are synchronous, high-performance CMOS static random access memory (SRAM) devices.

These SRAMs have a common I/O bus.

The rising edge of K clock initiates the read/write operation, and all internal operations are self-timed.

Key Features

  • 2Mx36 and 4Mx18 configuration available.
  • Common I/O read and write ports.
  • Max. 400 MHz clock for high bandwidth.
  • Synchronous pipeline read with self-timed late write operation.
  • Double Data Rate (DDR) interface for read and write input ports.
  • Fixed 2-bit burst for read and write operations.
  • Clock stop support.
  • Two input clocks (K and K#) for address and control registering at rising edges only.
  • Two input clocks (C and C#) for data output contro.

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Similar Datasheet

Brand Logo Part Number Description Manufacturer
Integrated Silicon Solution Logo IS61DDB24M18 DDR-II (Burst of 2) CIO Synchronous SRAMs Integrated Silicon Solution
Integrated Silicon Solution Logo IS61DDB24M18A 72Mb DDR-II (Burst 2) CIO SYNCHRONOUS SRAM Integrated Silicon Solution

More Datasheets from ISSI (now Infineon)

Part Number Description
IS61DDB22M36C 72Mb DDR-II CIO SYNCHRONOUS SRAM
IS61DDP2B21M36C 36Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B21M36C1 36Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B21M36C2 36Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B22M18C 36Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B22M18C1 36Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B22M18C2 36Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B41M18C 18Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B41M18C1 18Mb DDR-IIP CIO SYNCHRONOUS SRAM
IS61DDP2B41M18C2 18Mb DDR-IIP CIO SYNCHRONOUS SRAM