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IS61SF12836 Datasheet PDF

Integrated Silicon Solution IS61SF12836

The ISSI IS61SF12832 and IS61SF12836 are high-speed synchronous static RAM designed to provide a burstable, high-performance memory for high speed networking and communication applications. It is organized as 131,072 words by 32 bits or 36 bits, fabricated with ISSI's advanced CMOS technology.
Part No. IS61SF12836
Datasheet IS61SF12836 Download
Manufacturer
Integrated Silicon Solution
Description 128K x 36 SYNCHRONOUS FLOW-THROUGH STATIC RAM
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IS61SF12836 datasheet page 1 preview

FEATURES

● Fast access times: 7.5 ns, 8 ns, 8.5 ns, 10 ns, and 12 ns
● Internal self-timed write cycle
● Individual Byte Write Control and Global Write
● Clock controlled, registered address, data inputs and control signals
● Pentium™ or linear burst sequence control using MODE input
● Three chip enables for simple depth expansion and address pipelining
● Common data inputs and data outputs
● JEDEC 100-Pin TQFP and 119-pin PBGA package
● Single +3.3V +10%, –5% power supply
● Power-down snooze mode ISSI ® APRIL 2001

DESCRIPTION

The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All synchronous inputs pass through registers controlled by a positive-edge-triggered single clock input. Write cycles are internally self-timed and are initiated by the rising edge of the clock input. Write cycles can be from one to four bytes wide as controlled by the write control inputs. Separate byte enables allow individual bytes to be written.
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