Datasheet4U Logo Datasheet4U.com

IS62C256 - 32K x 8 LOW POWER CMOS STATIC RAM

General Description

The ISSI IS62C256 is a low power, 32,768 word by 8-bit CMOS static RAM.

performance, low power CMOS technology.

Key Features

  • Access time: 45, 70 ns.
  • Low active power: 200 mW (typical).
  • Low standby power.
  • 250 µW (typical) CMOS standby.
  • 28 mW (typical) TTL standby.
  • Fully static operation: no clock or refresh required.
  • TTL compatible inputs and outputs.
  • Single 5V power supply.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
IS62C256AL 32K x 8 LOW POWER CMOS STATIC RAM Integrated Silicon Solution
IS62C1024L 128K x 8 LOW POWER CMOS STATIC RAM Integrated Silicon Solution Inc
IS62C51216AL ULTRA LOW POWER CMOS STATIC RAM Integrated Silicon Solution
IS62C6416AL 64K x 16 HIGH-SPEED CMOS STATIC RAM Integrated Silicon Solution
IS620 OPTICALLY COUPLED BILATERAL SWITCH LIGHT ACTIVATED ZERO VOLTAGE CROSSING TRIAC ETC

Other Datasheets by ISSI (now Infineon)

Part Number Description
IS62C25616BL 256K x 16 HIGH-SPEED CMOS STATIC RAM
IS62C25616EL ULTRA LOW POWER CMOS STATIC RAM
IS62C1024 128K x 8 HIGH-SPEED CMOS STATIC RAM
IS62C1024AL 128K x 8 LOW POWER CMOS STATIC RAM
IS62C5128BL 512K x 8 HIGH-SPEED CMOS STATIC RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS62C256 32K x 8 LOW POWER CMOS STATIC RAM ISSI ® FEATURES • Access time: 45, 70 ns • Low active power: 200 mW (typical) • Low standby power — 250 µW (typical) CMOS standby — 28 mW (typical) TTL standby • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 5V power supply DESCRIPTION The ISSI IS62C256 is a low power, 32,768 word by 8-bit CMOS static RAM. It is fabricated using ISSI's high- performance, low power CMOS technology. When CS is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) at CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Select (CS) input and an active LOW Output Enable (OE) input.