SAF-C167CS-L16M3V
Key Features
- High Performance 16-bit CPU with 4-Stage Pipeline – 125 ns Instruction Cycle Time at 16 MHz CPU Clock – 625 ns Multiplication (16 × 16 bit), 1250 ns Division (32/16 bit) – Enhanced Boolean Bit Manipulation Facilities – Additional Instructions to Support HLL and Operating Systems – Register-Based Design with Multiple Variable Register Banks – Single-Cycle Context Switching Support – 16 MBytes Total Linear Address Space for Code and Data – 1024 Bytes On-Chip Special Function Register Area
- 16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 62 ns
