Datasheet Summary
HYB 39S128400/800/160CT(L) 128-MBit Synchronous DRAM
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128-MBit Synchronous DRAM
- High Performance: -7 -7.5 133 7.5 5.4 10 6 -8 125 8 6 10 6 Units MHz ns ns ns ns
- Multiple Burst Read with Single Write Operation
- Automatic and Controlled Precharge mand
- Data Mask for Read/Write Control (x4, x8)
- Data Mask for byte control (x16)
- Auto Refresh (CBR) and Self Refresh
- Power Down and Clock Suspend Mode
- 4096 Refresh Cycles / 64 ms fCK tCK3 tAC3 tCK2 tAC2
143 7 5.4 7.5 5.4
- Single Pulsed RAS Interface
- Fully Synchronous to Positive Clock Edge
- 0 to 70 °C operating temperature
- Four Banks controlled by BA0 & BA1
- Programmable CAS Latency: 2, 3
-...
