Infineon Technologies C164SM
the C164CM please refer to the “Product Catalog Microcontrollers”, which summarizes all available microcontroller variants. They combine high CPU performance (up to 12.5 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. They also provide clock generation via PLL and various on-chip memory modules such as program ROM or OTP, internal RAM, and extension RAM.| Part No. | C164SM |
|---|---|
| Datasheet | C164SM Download |
| Manufacturer |  Infineon Technologies |
| Description | 16-Bit Single-Chip Microcontroller |
| Buy | Stock & Price |
Data Sheet, V1.0, May 2001 C164CM/SM 16-Bit Single-Chip Microcontroller Microcontrollers Never stop thinking. 16-Bit Single-Chip Microcontroller C166 Family C164CM C164CM, C164SM
● High Performance 16-bit CPU with 4-Stage Pipeline – 80 ns Instruction Cycle Time at 25 MHz CPU Clock – 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit) – Enhanced Boolean Bit Manipulation Facilities – Additional Instructions to Support HLL and Operating Systems – Register-Based Design with Multiple Variable Register Banks – Single-Cycle Context Switching Support – 16 MBytes Total Linear Address Space for Code and Data – 1024 Bytes On-Chip Special Function Register Area
● 16-Priority-Level Interrupt System with 32 Sources, Sample-Rate down to 40 ns
● 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
● Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5), via prescaler or via direct clock input
● On-Chip Memory Modules – 2 KBytes On...
● High Performance 16-bit CPU with 4-Stage Pipeline – 80 ns Instruction Cycle Time at 25 MHz CPU Clock – 400 ns Multiplication (16 × 16 bit), 800 ns Division (32 / 16 bit) – Enhanced Boolean Bit Manipulation Facilities – Additional Instructions to Support HLL and Operating Systems – Register-Based Design with Multiple Variable Register Banks – Single-Cycle Context Switching Support – 16 MBytes Total Linear Address Space for Code and Data – 1024 Bytes On-Chip Special Function Register Area
● 16-Priority-Level Interrupt System with 32 Sources, Sample-Rate down to 40 ns
● 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
● Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5), via prescaler or via direct clock input
● On-Chip Memory Modules – 2 KBytes On...
