Infineon Technologies C167CS-4R
the C167CS please refer to the “Product Catalog Microcontrollers”, which summarizes all available microcontroller variants. They combine high CPU performance (up to 20 million instructions per second) with high peripheral functionality and enhanced IO-capabilities. They also provide clock generation via PLL and various on-chip memory modules such as program ROM, internal RAM, and extension RAM.| Part No. | C167CS-4R |
|---|---|
| Datasheet | C167CS-4R Download |
| Manufacturer |  Infineon Technologies |
| Description | 16-Bit Single-Chip Microcontroller |
| Buy | Stock & Price |
Data Sheet, V2.2, Aug. 2001 C167CS-4R C167CS-L 16-Bit Single-Chip Microcontroller Microcontrollers Never stop thinking. 16-Bit Single-Chip Microcontroller C166 Family C167CS C167CS-4R, C167CS-L
● High Performance 16-bit CPU with 4-Stage Pipeline – 80/60/50 ns Instruction Cycle Time at 25/33/40 MHz CPU Clock – 400/303/250 ns Multiplication (16 × 16 bit), 800/606/500 ns Division (32-/16-bit) – Enhanced Boolean Bit Manipulation Facilities – Additional Instructions to Support HLL and Operating Systems – Register-Based Design with Multiple Variable Register Banks – Single-Cycle Context Switching Support – 16 MBytes Total Linear Address Space for Code and Data – 1024 Bytes On-Chip Special Function Register Area
● 16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 40/30/25 ns
● 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
● Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5), via prescaler or via direct cl...
● High Performance 16-bit CPU with 4-Stage Pipeline – 80/60/50 ns Instruction Cycle Time at 25/33/40 MHz CPU Clock – 400/303/250 ns Multiplication (16 × 16 bit), 800/606/500 ns Division (32-/16-bit) – Enhanced Boolean Bit Manipulation Facilities – Additional Instructions to Support HLL and Operating Systems – Register-Based Design with Multiple Variable Register Banks – Single-Cycle Context Switching Support – 16 MBytes Total Linear Address Space for Code and Data – 1024 Bytes On-Chip Special Function Register Area
● 16-Priority-Level Interrupt System with 56 Sources, Sample-Rate down to 40/30/25 ns
● 8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via Peripheral Event Controller (PEC)
● Clock Generation via on-chip PLL (factors 1:1.5/2/2.5/3/4/5), via prescaler or via direct cl...
