CY8C4024AZQ-S413 Datasheet PDF - Infineon 4000S MCU Specs

CY8C4024AZQ-S413 - 4000S MCU

This page provides the datasheet information for the CY8C4024AZQ-S413, a member of the CY8C4024FNI-S402T 4000S MCU family.

Datasheet Summary

Description

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU.

It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

Features

32-bit MCU subsystem - 48-MHz Arm® Cortex®-M0+ CPU with single-cycle multiply - Up to 32 KB of flash with read accelerator - Up to 4 KB of SRAM.
Programmable analog - Single-slope 10-bit ADC function provided by Capacitance sensing block - Two current DACs (IDACs) for general-purpose or capacitive sensing.

Datasheet Details

Part number	CY8C4024AZQ-S413
Manufacturer	Infineon
File Size	808.04 KB
Description	4000S MCU
Datasheet	CY8C4024AZQ-S413 Datasheet
Additional preview pages of the CY8C4024AZQ-S413 datasheet.

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Full PDF Text Transcription

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CY8C40xx PSoC™ 4000S MCU Based on Arm® Cortex®-M0+ CPU General description PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC™ 4000S product family is a member of the PSoC™ 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity.

Published: Sep 2, 2024 |