Description
PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU while being AEC-Q100 compliant.
It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.
Features
- Automotive Electronics Council (AEC) AEC-Q100 Qualified.
- 32-bit MCU subsystem - 48-MHz Arm® Cortex®-M0+ CPU - Up to 128 KB of flash with Read Accelerator - Up to 16 KB of SRAM - 8-channel DMA engine.
- Programmable analog - Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode. - 12-bit 1-Msps SAR ADC with differential and single-ended.
CY8C4126AZS-S455 Datasheet
