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CY8C4146AXI-S453 - 4100S Plus MCU

This page provides the datasheet information for the CY8C4146AXI-S453, a member of the CY8C4126AXI-S443 4100S Plus MCU family.

Datasheet Summary

Description

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU.

It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

Features

  • 32-bit MCU subsystem - 48 MHz Arm® Cortex®-M0+ CPU with single-cycle multiply - Up to 128 KB of flash with read accelerator - Up to 16 KB of SRAM - 8-channel DMA engine.
  • Programmable analog - Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode. - 12-bit 1-Msps SAR ADC with differential and single-ended modes, and Channel Sequencer with signa.

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Datasheet Details

Part number CY8C4146AXI-S453
Manufacturer Infineon
File Size 784.64 KB
Description 4100S Plus MCU
Datasheet download datasheet CY8C4146AXI-S453 Datasheet
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Full PDF Text Transcription

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CY8C41xx PSoC™ 4100S Plus Based on Arm® Cortex®-M0+ CPU General description PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm® Cortex®-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. PSoC™ 4100S Plus is a member of the PSoC™ 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity.
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