Description
The CYEL17B family devices are flash non-volatile memory products using:
Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) charge trap gate technology
40-nm process lithography The CYEL17B family connects to a host system via a Serial Peripheral Interface (SPI).
Features
- a page programming buffer that allows up to 2 KB to be programmed in one operation and provides individual 1 MB sector, 8 MB block, or entire 64 MB chip erase. By using CYEL17B family devices at the higher clock rates supported, with Quad commands, the instruction read transfer rate can match or exceed traditional parallel interface, asynchronous NOR flash memories while reducing signal count dramatically. The CYEL17B family products offer high densities coupled with the flexibility and fast per.