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CYT2BL7CAE Key Features

  • Dual CPU subsystem
  • Single-cycle multiply
  • Single-precision floating point unit (FPU)
  • Memory protection unit (MPU)
  • Single-cycle multiply
  • Memory protection unit
  • Inter-processor munication in hardware
  • Three DMA controllers
  • Peripheral DMA controller #0 (P-DMA0) with 92 channels
  • Peripheral DMA controller #1 (P-DMA1) with 44 channels

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CYT2BL7CAE Description

CYT2BL is a family of TRAVEO™ T2G microcontrollers targeted at automotive systems such as body control units. CYT2BL has an Arm® Cortex®-M4F CPU for primary processing, and an Arm® Cortex®-M0+ CPU for peripheral and security processing. These devices contain embedded peripherals supporting Controller Area Network with Flexible Data rate (CAN FD), Local Interconnect Network (LIN), and Clock Extension Peripheral...