CYT2CL Overview
CYT2CL is a family of TRAVEO™ T2G microcontrollers targeted at automotive systems such as cluster entry units. CYT2CL has an Arm® Cortex®-M4F CPU for primary processing, and an Arm® Cortex®-M0+ CPU for peripheral and security processing. These devices contain embedded peripherals supporting controller area network with flexible data rate (CAN FD), local interconnect network (LIN), clock extension peripheral...
CYT2CL Key Features
- Dual CPU subsystem
- Single-cycle multiply
- Single-precision floating point unit (FPU)
- Memory protection unit (MPU)
- Single-cycle multiply
- Memory protection unit
- Inter-processor munication in hardware
- Three DMA controllers
- Peripheral DMA controller #0 (P-DMA0) with 76 channels
- Peripheral DMA controller #1 (P-DMA1) with 84 channels