CYT3DLBBHBQ1BZSGS
Description
CYT3DL is a family of TRAVEO™ T2G microcontrollers targeted at automotive systems such as instrument clusters and Head-Up Displays (HUD). CYT3DL has a 2D Graphics engine, sound processing, an Arm® Cortex®-M7 CPU for primary processing, and an Arm® Cortex®-M0+ CPU for peripheral and security processing.
Key Features
- Graphics subsystem - Supports 2D and 2.5D (perspective warping, 3D effects) graphics rendering - Internal color resolution
- 40-bit for RGBA (4 × 10-bit)
- 24-bit for RGB (3 × 8-bit) - 2048 KB of embedded video RAM memory (VRAM) - Two video output interfaces supporting a display from
- Parallel RGB (max display size: 800 × 600 at 40 MHz)
- FPD-link single (max display size: 1920 × 720 at 110 MHz) - One Capture engine for video input processing for ITU 656 or parallel RGB/YUV or MIPI CSI-2 input
- ITU656 (standard camera capture: up to 800 × 480), multiplexed with RGB interface
- RGB (max capture size 1600 × 600 at 80 MHz) or
- Two-/four-lane MIPI CSI-2 interface (max capture size: 1920 × 720 for two lanes at 110 MHz, 2880 × 1080 for four lanes at 220 MHz) - Display warping on-the-fly for HUD applications - Direct video feed through from capture to display interface with graphics overlay - Composition engine for scene composition from display layers - Display engine for video timing generation and display functions - Drawing engine for acceleration of vector graphics rendering - Command sequencer for setup and control of the rendering process - Supports graphics rendering without frame buffers (on-the-fly) - Single-channel FPD-Link/LVDS interface for up to HD resolution video output
- Sound subsystem - Four time-division multiplexing (TDM) interfaces - Two pulse-code modulation-pulse width modulation (PCM-PWM) interfaces - Up to five sound generator (SG) interfaces - Two PCM Audio stream mixers with five input streams - One audio digital-to-analog converter (DAC)
- CPU subsystem - 240-MHz (max) 32-bit Arm® Cortex®-M7 CPU, with
