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ESD102-U2-099EL - Transient Voltage Suppressor Diodes

General Description

Pin 1 TSLP-4-x A1 A2 ESD102-U2-099EL Pin 1 Pin 4 A1 A2 Figure 1 B1 B2 B1 B2 Pin 2 Pin 3 a) Pin configuration b) Schematic diagram PG-TSLP-4-x_Dual_Diode_PinConf_and_SchematicDiag.vsd Pin Configuration and Schematic Diagram Table 1 Ordering Information Type Package ESD102-U2-099EL TSLP-

Key Features

  • ESD / transient protection of high speed data lines exceeding:.
  • IEC61000-4-2 (ESD): ±20 kV (air / contact).
  • IEC61000-4-4 (EFT): ±2.5 kV / 50 A (5/50ns).
  • IEC61000-4-5 (Surge): ±3 A (8/20μs).
  • Maximum working voltage: VRWM = 3.3 V.
  • Ultra low capacitance CL = 0.4 pF (typ. ) I/O to GND, 0.2 pF (typ. ) I/O to I/O.
  • Very low clamping voltage: VCL = 8 V (typ. ) at IPP = 16 A.
  • Very low dynamic resistance: RDYN = 0.19 Ω (typ. ).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TVS Diodes Transient Voltage Suppressor Diodes ESD102-U2-099EL 2-Line Ultra-low Capacitance ESD / Transient Protection Diodes ESD102-U2-099EL Data Sheet Revision 1.1, 2013-05-15 Final Power Management & Multimarket Edition 2013-05-15 Published by Infineon Technologies AG 81726 Munich, Germany © 2013 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.