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HYB18H512321AF-20 Datasheet PDF

Infineon Technologies HYB18H512321AF-20

The HYB18H512321AF operates from a differential clock (CLK and CLK).
Part No. HYB18H512321AF-20
Datasheet HYB18H512321AF-20 Download
Manufacturer
Infineon Technologies
Description 512-Mbit GDDR3 Graphics RAM
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HYB18H512321AF-20 datasheet page 1 preview

FEATURES

● 2.0 V VDDQ IO voltage HYB18H512321AF–12/14/16/20
● 2.0 V VDD core voltage HYB18H512321AF–12/14/16/20
● 1.8 V VDDQ IO voltage HYB18H512321AFL14/16/20
● 1.8 V VDD core voltage HYB18H512321AFL14/16/20
● Organization: 2048K × 32 × 8 banks
● 4096 rows and 512 columns (128 burst start locations) per bank
● Differential clock inputs (CLK and CLK)
● CAS latencies of 7, 8, 9, 10, 11
● Write latencies of 3, 4
● Burst sequence with length of 4, 8.
● 4n prefetch
● Short RAS to CAS timing for Writes
● tRAS Lockout support
● tWR programmable for Writes with Auto-Precharge
● Data mask for write commands
● Single ended READ strobe (RDQS) per byte. RDQS edge-aligned with READ data
● Single ended WRITE strobe (WDQS) per byte. WDQS center-aligned with WRITE data
● DLL aligns RDQS and DQ transitions with Clock
● Programmable IO interface including on chip termination (ODT)
● Autoprecharge option with concurrent autoprecharge support
● 8k Refresh (32ms)
● Autorefresh and Self Refresh
● PG-TFBGA 136 package (11mm × 14mm)
● Calibrated output drive.
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