S25FS512S Datasheet | Infineon

512 Mb (64 MB) FS-S Flash SPI Multi-I/O, 1.8 V Features - Serial peripheral interface (SPI) with multi-I/O - SPI clock polarity and phase modes 0 and 3 - Double data rate (DDR) option - Extended addressing: 24- or 32-bit address options - Serial mand subset and footprint patible with S25FL-A, S25FL-K, S25FL-P, and S25FL-S SPI families - Multi I/O mand subset and footprint patible with S25FL-P, and S25FL-S SPI families - Read - mands: Normal, Fast, Dual I/O, Quad I/O, DDR Quad I/O - Modes: Burst wrap, continuous (XIP), QPI - Serial flash discoverable parameters (SFDP) and mon flash interface (CFI) for configuration information - Program - 256 or 512 bytes page programming buffer - Program suspend and resume - Automatic error checking and correction (ECC) - Internal hardware ECC with single bit error correction - Erase - Hybrid sector option - Physical set of eight 4-KB sectors and one 224-KB sector at the top or bottom of address space with all remaining sectors of 256-KB - Uniform sector option - Uniform 256-KB blocks - Erase suspend and resume - Erase status evaluation - Cycling endurance - 100,000 program-erase cycles, minimum - Data retention - 20 year data retention, minimum - Security...