S26HL512T Overview
S26HS256T, S26HS512T, S26HS01GT, S26HL256T, S26HL512T, S26HL01GT 256Mb/512Mb/1Gb SEMPER™ Flash HYPERBUS™ interface, 1.8 V/3.0.
S26HL512T Key Features
- Infineon 45-nm MIRRORBIT™ technology that stores two data bits in each memory array cell
- Sector architecture options
- Uniform: Address space consists of all 256KB sectors
- Hybrid
- Configuration 1: Address space consists of thirty-two 4KB sectors grouped either on the top or the bottom while the rema
- Configuration 2: Address space consists of thirty-two 4KB sectors equally split between top and bottom while the remaini
- Page Programming buffer of 256 or 512 bytes
- OTP secure silicon region (SSR) of 1024 bytes (32 × 32 bytes)
- HYPERBUS™ interface
- JEDEC eXpanded SPI (JESD251) patible