S70FL01GS Overview
General description This document contains information for the S70FL01GS device, which is a dual die stack of two S25FL512S die. For detailed specifications, refer to the discrete die datasheet provided in the Affected documents/Related documents table. O 2022-05-02 1 Gbit (128 Mbyte) FL-S Flash SPI Multi-I/O, 3.0 V Table of contents Table of contents.
S70FL01GS Key Features
- CMOS 3.0 V Core
- Serial peripheral interface (SPI) with Multi-I/O
- SPI clock polarity and phase modes 0 and 3
- Double data rate (DDR) option
- Extended addressing: 32-bit address
- Serial mand set and footprint patible with S25FL-A, S25FL-K, and S25FL-P SPI families
- Multi I/O mand set and footprint patible with S25FL-P SPI family
- READ mands
- Normal, Fast, Dual, Quad, Fast DDR, Dual DDR, Quad DDR
- AutoBoot