S70KL1283 - 128Mb self-refresh DRAM

Product Overview

Infineon

Datasheet Details

Part number	S70KL1283
Manufacturer	Infineon
File Size	1.02 MB
Description	128Mb self-refresh DRAM
Datasheet	S70KL1283 Datasheet
Additional preview pages of the S70KL1283 datasheet.

Product details

Description

1.1 xSPI (Octal) interface 6 2 Product overview 9 2.1 xSPI (Octal) interface 9 3 Signal description 10 3.1 Input/output summary10 4 xSPI (Octal) transaction details11 4.1 Command/addre

Features

Interface - xSPI (Octal) interface - 1.8 V / 3.0 V interface support.
Single ended clock (CK) - 11 bus signals.
Optional differential clock (CK, CK#) - 12 bus signals - Chip Select (CS#) - 8-bit data bus (DQ[7:0]) - Hardware reset (RESET#) - Bidirectional read-write data strobe (RWDS).
Output at the start of all transactions to indicate refresh latency.
Output during read transactions as read data strobe.
Input during write transactions as w.

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Published: Jul 16, 2024 |