Infineon Technologies S78HS512TC0
This supplementary datasheet provides MCP device related information for Octal MCP family, incorporating both SEMPER™ Flash and HYPERRAM™ 2.0 with Octal interface memories. The document describes how the features, operation, and ordering options of the related memories have been enhanced or changed from the standard memory devices incorporated in the MCP.FEATURES
● SEMPER™ Flash and HYPERRAM™2.0 with Octal interface in multi-chip package (MCP) - 1.8 V, 512Mb SEMPER™ Flash and 64Mb HYPERRAM™ 2.0 (S78HS512TC0) - 3.0 V, 512Mb SEMPER™ Flash and 64Mb HYPERRAM™ 2.0 (S78HL512TC0) - FBGA 24-ball, 8 × 8 × 1.2 mm packages● Octal interface - 1.8V I/O (S78HS-TC0) - 3.0V I/O (S78HL-TC0) - Chip select (CS#) - 8-bit data bus (DQ[7:0]) - Data strobe (DS/RWDS)
● Bidirectional DS/mask
● Output at the start of all transactions to indicate refresh latency
● Output during read transactions as read DS
● Input during write transactions as write data mask (HYPERRAM™ only)
● Optional signals - INT# output to generate external interrupt
● Busy to ready transition
● High-performance - DDR
● Two data transfers per clock - Up to 200 MHz clock rate (400-MBps) at 1.8 V VCC - Up to 166 MHz clock rate (333-MBps) at 3.0 V VCC Supplement Datasheet Please read the Important Notice and Warnings at the end of this document page 1 002-31361 Rev. *B 2022-09-21 512Mb SEMPER™ Flash and 64Mb HYPERRAM™ 2.0 Octal interface, multi-chip package, 1.8 V/3.0 V Table of contents Table of contents
FEATURES
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