Inphi 13650DE
The 13650DE differential encoder performs modulo two addition of the input data bit with the previous output bit. The part operates up to 13 Gbps and retimes the input data before performing the encoding operation, thereby providing a large input phase margin. The encoder is nominally positive-edge triggered; however, by reversing the positive and negative clock connections, a negative-edge triggered application can be accommodated.APPLICATIONS
● High-speed (up to 13 Gbps) optical duobinary systems● High-speed (up to 13 Gbps) optical differential phase shift keying systems (DPSK)
● High-speed (up to 13 GHz) digital logic
● Broadband test and measurement equipment
FEATURES
● Supports data rates up to 13 Gbps● Output signal swing 1200 mVpp differential
● Fast rise and fall times typically 15 ps
● Single –3.3 V power supply
● Low power consumption: 380 mW
● Available in plastic QFN package
● 290° input phase margin (at 12.5 Gbps)
● Evaluation board available
● Supports single-ended and differential operation
DESCRIPTION
All differential data and differential clock inputs are on-chip DC coupled and terminated with 50 Ω resistors to ground (GND). For direct- coupled applications, the differential data outputs should be terminated off chip with 50 Ω resistors to GND. For applications requiring termination to DC levels other than GND, external AC coupling to a good RF ground is required. See the application note for various termination examples.