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ICS181-53 Datasheet PDF

Integrated Circuit Systems ICS181-53

The ICS181-53 generates a low EMI output clock from a clock or crystal input. The device uses ICS’ proprietary mix of analog and digital Phase Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. The ICS181-53 offers center spread selection of +/-0.625% and +/-1.875%.
Part No. ICS181-53
Datasheet ICS181-53 Download
Manufacturer
Integrated Circuit Systems
Description Low EMI Clock Generator
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ICS181-53 datasheet page 1 preview

DESCRIPTION

Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. ICS offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board.

FEATURES

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● Pin and function compatible to Cypress W181-53 Packaged in 8-pin SOIC Provides a spread spectrum output clock Accepts a clock input and provides same frequency dithered output
● Input frequency of 46 to 75 MHz for Clock input
● Peak reduction by 7dB - 14dB typical on 3rd - 19th odd harmonics
● Spread percentage selection for +/-0.625% and +/-1.875%
● Operating voltage of 3.3 V and 5 V
● Advanced, low-power CMOS process Block Diagram VDD FS1 SSON# SS% PLL Clock Synthesis and Spread Spectrum Circuitry Clock Buffer CLK CLKIN GND MDS 181-53 A 1 l Revision 110404 tel (408 ) 29 7-120 1 l I n t e gra t e d C i r cu i t S y s t e m s l 5 25 Race Street, San Jo se, CA 9 512 6 w w w. i c st . c o m ICS181-53 LOW EMI CLOCK GENERATOR Pin Assignme...
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