GENERAL DESCRIPTION
FEATURES
One chip integrated physical layer All CMOS, Low power design (<200mA max) Small footprint 64-pin 14mm 2 QFP package ISO/IEC 8802-3 CSMA/CD compliant Media Independent Interface (MII) Alternate 100M stream and 10M 7-wire serial interfaces provided 10Base-TX Half & Full Duplex 100Base-TX Half & Full Duplex Fully integrated TP-PMD including Stream Cipher Scrambler, MLT-3 encoder, Adaptive Equalization, and Baseline Wander Correction Circuitry Block Diagram PHYceiver and QuickPoll are trademarks of Integrated Circuit Systems, Inc. Patents pending. ICS1890RevG 10/21/97 ICS reserves the right to make changes in the device data identified in this publication without further notice. ICS advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate. ICS1890 Introduction The ICS1890 is essentially a nibble/bit stream processor. When transmitting, it takes sequential nibbles presented at the Media Independent Interface (MII) and translates them to a serial bit stream for transmission on the media.
Integrated Circuit Systems
