ICS85411
Overview
The ICS85411 is a low skew, high performance 1-to-2 Differential-to-LVDS Fanout Buffer and a HiPerClockS™ member of the HiPerClockS™family of High Performance Clock Solutions from ICS. The CLK, nCLK pair can accept most standard differential input ICS85411 is characterized to operate from a 3.3V power supply.
- 2 differential LVDS outputs
- 1 differential CLK, nCLK clock input
- CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
- Maximum output frequency: 650MHz
- Translates any single ended input signal to LVDS levels with resistor bias on nCLK input
- Output skew: 20ps (maximum)
- Part-to-part skew: 250ps (maximum)
- Additive phase jitter, RMS: 0.05ps (typical)
- Propagation delay: 2.5 ns (maximum)
- 3.3V operating supply
