ICS85411 Datasheet | Integrated Circuit Systems

Integrated Circuit Systems, Inc. LOW SKEW, 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER Features - 2 differential LVDS outputs - 1 differential CLK, nCLK clock input - CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL - Maximum output frequency: 650MHz - Translates any single ended input signal to LVDS levels with resistor bias on nCLK input - Output skew: 20ps (maximum) - Part-to-part skew: 250ps (maximum) - Additive phase jitter, RMS: 0.05ps (typical) - Propagation delay: 2.5 ns (maximum) - 3.3V operating supply - 0°C to 70°C ambient operating temperature - Lead-Free package available - Industrial temperature information available...