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ICS9148-13 - Frequency Generator & Integrated Buffers

General Description

The ICS9148-13 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel Pentium and PentiumPro.

An output enable is provided for testability.

Spread Spectrum is available to modulate the CPU and BUS PLL (leaving the REF, 24, 48 MHz operating normally).

Key Features

  • • •.
  • • • Generates twelve processor, six bus, two 14.31818MHz, 24MHz and one 48MHz clock for USB support. Synchronous clocks skew matched to 250 ps window on CPUs and 500 ps window on BUSs CPU to BUS skew, 3.0 to 5.0ns (CPU Early) 3.0V - 3.7V supply range 48-pin SSOP package Pin Configuration Block Diagram 48-Pin SSOP Output Enable OE REF 24 48 CPU (MHz) (MHz) BUS VCO OSC Functionality FS2 0 0 0 0 1 1 1 1 FS1 0 0 1 1 0 0 1 1 FS0 0 1 0 1 0 1 0 1 CPU (1:12) in MHz 75 100 75 83.3 50 6.

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Datasheet Details

Part number ICS9148-13
Manufacturer Integrated Circuit Systems
File Size 347.73 KB
Description Frequency Generator & Integrated Buffers
Datasheet download datasheet ICS9148-13 Datasheet

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Integrated Circuit Systems, Inc. ICS9148-13 Frequency Generator & Integrated Buffers for PENTIUMTM General Description The ICS9148-13 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel Pentium and PentiumPro. An output enable is provided for testability. Spread Spectrum is available to modulate the CPU and BUS PLL (leaving the REF, 24, 48 MHz operating normally). The SS_EN# pin enables the spreading when low. The SS_TYPE pin choses ±0.5% (nominally) center spread or +0, -2% (nominally) downspread modulation. High drive BUS outputs typically provide greater than 1 V/ns slew rate into 30 pF loads. CPU outputs typically provide better than 1V/ns slew rate into 20 pF loads while maintaining 50 ± 5% duty cycle.