ICS9148-75 Datasheet | Integrated Circuit Systems

Integrated Circuit Systems, Inc. Preliminary Product Preview Frequency Generator & Integrated Buffers for Mother Boards General Description The ICS9148-75 generates all clocks required for high speed RISC or CISC microprocessor systems such as Intel Pentium Pro™, AMD™ or Cyrix™. Sixteen different reference frequency multiplying factors are externally selectable with smooth frequency transitions. Spread spectrum may be enabled through I2C programming. Spread spectrum typically reduces system EMI by 8d B to 10d B. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS9148-75 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Serial programming I2C interface allows changing functions, stop clock programming and frequency selection. The SDRAM12 output may be used as a feed back into an off chip PLL. Features - Generates the following system clocks: - 3 CPU(2.5V/3.3V) up to 100MHz. - 6 PCI(3.3V) @ 33.3MHz (including one free running PCICLK) - 3AGP(3.3V) @ 2 x PCI - 13 SDRAMs(3.3V) up to 100MHz - 1 REF (3.3V) @ 14.318MHz - 1 - 48MHz (3.3V) fixed Skew characteristics: - CPU - CPU<250ps - CPU(early) - PCI : 1-4ns - AGP - PCI: 250ps - PCI - PCI <500ps Supports Spread Spectrum modulation & I2C programming for Power Management, Frequency Select Efficient Power management scheme through power down PCI, AGP and CPU_STOP clocks. Uses external 14.318MHz crystal 48 pin 300mil SSOP. - - - - - Block Diagram Pin Configuration Power Groups VDD1 = REF (0:1), X1, X2 VDD2 = PCICLK_F, PCICLK(0:5) VDD3 = SDRAM (0:11), supply for PLL core VDD4 = AGP (1:2) VDD5 = Fixed PLL, 48MHz , AGP0 VDDL = CPUCLK (0:3) 9148-75 Rev C 3/01/00 48-Pin...