ICS9248-192 Datasheet PDF - Integrated Circuit Systems Frequency Timing Generator for Transmeta Systems Specs

ICS9248-192 - Frequency Timing Generator for Transmeta Systems

Datasheet Summary

Description

Pin number 1 2 3 4 12, 11, 10, 7, 6, 5 8 9 15 13 14 16 48MHz 17 18 GND48 VDD48 Output Power Power Pin name GNDREF X1 X2 PD# PCICLK (5:0) GNDPCI VDDPCI Sel48_24# 24_48MHz SDATA SCLK CPU3.3-2.5# Type Power Input Output Input Output Power Power Input Output I/O IN Input Description Ground for 14.318 M

Features

1CPU(2.5V or 3.3V selectable) up to 66.6MHz & overclocking of 66MHz.
6 PCI (3.3V) @ 33.3MHz (all are free running selectable). 1 REF (3.3V) at 14.318MHz. 1 48MHz (3.3V). 1 24_48MHz selectable output. Pin Configuration GNDREF X1 X2 PD# PCICLK0 PCICLK1 PCICLK2 GNDPCI VDDPCI PCICLK3 PCICLK4 PCICLK5 SDATA SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Features:.
Supports Spread Spectrum modulation for CPU and PCI clocks, default -0.4 downspread.

Datasheet Details

Part number	ICS9248-192
Manufacturer	Integrated Circuit Systems
File Size	105.86 KB
Description	Frequency Timing Generator for Transmeta Systems
Datasheet	ICS9248-192 Datasheet
Additional preview pages of the ICS9248-192 datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9248-192 Frequency Timing Generator for Transmeta Systems Recommended Application: Transmeta Output Features: • 1CPU(2.5V or 3.3V selectable) up to 66.6MHz & overclocking of 66MHz. • • • • 6 PCI (3.3V) @ 33.3MHz (all are free running selectable). 1 REF (3.3V) at 14.318MHz. 1 48MHz (3.3V). 1 24_48MHz selectable output. Pin Configuration GNDREF X1 X2 PD# PCICLK0 PCICLK1 PCICLK2 GNDPCI VDDPCI PCICLK3 PCICLK4 PCICLK5 SDATA SCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Features: • Supports Spread Spectrum modulation for CPU and PCI clocks, default -0.4 downspread. • Efficient Power management scheme through stop clocks and power down modes. • Uses external 14.318MHz crystal, no external load cap required for CL=18pF crystal. • 28-pin TSSOP package, 4.

Published: Apr 16, 2005 |