ICS9248-66 Datasheet PDF - Integrated Circuit Systems Frequency Generator & Integrated Buffers Specs

ICS9248-66 - Frequency Generator & Integrated Buffers

Datasheet Summary

Description

The ICS9248-66 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs.

This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator(DRCG) chip such as the ICS9211-01.

Features

Generates the following system clocks: - 3 CPU clocks ( 2.5V, 100/133MHz) - 8 PCI clocks, including 1 free-running (3.3V, 33MHz) - 1 CPU/2 clocks (2.5V, 50/66MHz) - 1 IOAPIC clocks (2.5V, 16.67MHz) - 3 Fixed frequency 66MHz clocks(3.3V, 66MHz) - 2 REF clocks(3.3V, 14.318MHz) - 1 USB clock (3.3V, 48MHz) Efficient power management through PD#, CPU_STOP# and PCI_STOP#. 0 to -0.5% typical down spread modulation on CPU, PCI, IOAPIC, 3V66 and CPU/2 output clocks. Uses external 14.318MHz crystal. Ke.

Datasheet Details

Part number	ICS9248-66
Manufacturer	Integrated Circuit Systems
File Size	382.31 KB
Description	Frequency Generator & Integrated Buffers
Datasheet	ICS9248-66 Datasheet
Additional preview pages of the ICS9248-66 datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9248-66 Advance Information Frequency Timing Generator for PENTIUM II Systems Features Generates the following system clocks: - 3 CPU clocks ( 2.5V, 100/133MHz) - 8 PCI clocks, including 1 free-running (3.3V, 33MHz) - 1 CPU/2 clocks (2.5V, 50/66MHz) - 1 IOAPIC clocks (2.5V, 16.67MHz) - 3 Fixed frequency 66MHz clocks(3.3V, 66MHz) - 2 REF clocks(3.3V, 14.318MHz) - 1 USB clock (3.3V, 48MHz) Efficient power management through PD#, CPU_STOP# and PCI_STOP#. 0 to -0.5% typical down spread modulation on CPU, PCI, IOAPIC, 3V66 and CPU/2 output clocks. Uses external 14.318MHz crystal. Key Specification CPU Output Jitter: <250ps CPU/2 Output Jitter.

Published: Oct 7, 2005 |