ICS9248-97 Datasheet PDF - Integrated Circuit Systems Frequency Generator & Integrated Buffers Specs

ICS9248-97 - Frequency Generator & Integrated Buffers

Datasheet Summary

Description

The ICS9248-97 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs.

This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator(DRCG) chip such as the ICS9212-01.

Features

3 - CPUs @ 2.5V, up to 180MHz. 3 - IOAPIC @ 2.5V, PCI/2 3 - 3V66MHz @ 3.3V. 11 - PCIs @ 3.3V 1 - 48MHz, @ 3.3V fixed 1 - 24/48MHz, @ 3.3V 1 - CPU/2, @ 2.5V. Features: Up to 180MHz frequency support Support power management: Power down Mode from I2C programming. Spread spectrum for EMI control ± 0.25% center spread). Uses external 14.318MHz crystal FS pins for frequency select Pin Configuration GNDREF REF0.
SEL24_48#/REF1 VDDREF X1 X2 GNDPCI.
FS0/PCICLK_F.
FS.

Datasheet Details

Part number	ICS9248-97
Manufacturer	Integrated Circuit Systems
File Size	466.17 KB
Description	Frequency Generator & Integrated Buffers
Datasheet	ICS9248-97 Datasheet
Additional preview pages of the ICS9248-97 datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS9248-97 Frequency Timing Generator for PENTIUM II Systems Recommended Application: Camino chipset Output Features: 3 - CPUs @ 2.5V, up to 180MHz. 3 - IOAPIC @ 2.5V, PCI/2 3 - 3V66MHz @ 3.3V. 11 - PCIs @ 3.3V 1 - 48MHz, @ 3.3V fixed 1 - 24/48MHz, @ 3.3V 1 - CPU/2, @ 2.5V. Features: Up to 180MHz frequency support Support power management: Power down Mode from I2C programming. Spread spectrum for EMI control ± 0.25% center spread). Uses external 14.

Published: Oct 7, 2005 |