ICS9250-12 Overview
The ICS9250-12 is a main clock synthesizer chip for Pentium II based systems using Rambus Interface DRAMs. This chip provides all the clocks required for such a system when used with a Direct Rambus Clock Generator (DRCG) chip such as the ICS9212-01, 02, 03 and a PCI buffer 9112-17. Spread Spectrum may be enabled by driving the SPREAD# pin active.
ICS9250-12 Key Features
- 4 CPU clocks ( 2.5V, 100/133MHz)
- 8 PCI clocks, including 1 free-running (3.3V, 33MHz)
- 2 CPU/2 clocks (2.5V, 50/66MHz)
- 3 IOAPIC clocks (2.5V, 16.67MHz)
- 4 Fixed frequency 66MHz clocks(3.3V, 66MHz)
- 2 REF clocks(3.3V, 14.318MHz)
- 1 USB clock (3.3V, 48MHz) Efficient power management through PD#, CPU_STOP# and PCI_STOP#. 0.5% typical down spread modu
- 1.5ns (CPU leads) CPU to PCI Output Offset: 1.5
- 4.0ns (CPU leads) CPU to APIC Output Offset 1.5
- 4.0ns (CPU leads)