ICS932S200 Datasheet | Integrated Circuit Systems

Integrated Circuit Systems, Inc. Frequency Timing Generator for Dual Server/Workstation Systems General Description The ICS932S200 is a dual CPU clock generator for serverworks HE-T, HE-SL-T, LE-T chipsets for P III type processors in a Dual-CPU system. Single ended CPU clocks provide faster than 1.5V/ns transition times by parallel connection of 2 CPU pins to each processor. Spread Spectrum may be enabled by driving the SPREAD# pin active. Spread spectrum typically reduces system EMI by 8d B to 10d B. This simplifies EMI qualification without resorting to board design iterations or costly shielding. The ICS932S200 employs a proprietary closed loop design, which tightly controls the percentage of spreading over process and temperature variations. Key Specification: - CPU Output Jitter: 150ps - IOAPIC Output Jitter: 250ps - 3V66, PCI Output Jitter: 250ps - CPU Output Skew: <175ps - PCI Output Skew: <500ps - 3V66 Output Skew <250ps - IOAPIC Output Skew <250ps - CPU to 3V66 Output Offset: 0 - 1.5ns (CPU leads) - CPU to PCI Output Offset: 1.5 - 4.0ns (CPU leads) - CPU to APIC Output Offset: 1.5 - 4.0ns (CPU leads) Block Diagram PLL2 48MHz X1 XTAL X2 PLL1 Spread Spectrum PD# PCI_STOP# CPU_STOP# SPREAD# SEL 133/100# SEL0 SEL1 Control...