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ICS952001 - Preliminary Product Previes

Description

The ICS952001 is a two chip clock solution for desktop designs using SIS 645/650 style chipsets.

When used with a zero delay buffer such as the ICS9179-06 for PC133 or the ICS93705 for DDR applications it provides all the necessary clocks signals for such a system.

Features

  • 2 - Pairs of differential CPUCLKs (differential current mode).
  • 1 - SDRAM @ 3.3V.
  • 8 - PCI @3.3V.
  • 2 - AGP @ 3.3V.
  • 2 - ZCLKs @ 3.3V.
  • 1- 48MHz, @3.3V fixed.
  • 1- 24/48MHz, @3.3V selectable by I2C (Default is 24MHz).
  • 3- REF @3.3V, 14.318MHz. Features/Benefits:.
  • Programmable output frequency, divider ratios, output rise/falltime, output skew.
  • Programmable spread percentage for EMI control.
  • Watchdog ti.

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Datasheet preview – ICS952001

Datasheet Details

Part number ICS952001
Manufacturer Integrated Circuit Systems
File Size 212.24 KB
Description Preliminary Product Previes
Datasheet download datasheet ICS952001 Datasheet
Additional preview pages of the ICS952001 datasheet.

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Full PDF Text Transcription

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Integrated Circuit Systems, Inc. ICS952001 Preliminary Product Preview Programmable Timing Control Hub™ for P4™ processor Recommended Application: SIS 645/650 style chipsets. Output Features: • 2 - Pairs of differential CPUCLKs (differential current mode) • 1 - SDRAM @ 3.3V • 8 - PCI @3.3V • 2 - AGP @ 3.3V • 2 - ZCLKs @ 3.3V • 1- 48MHz, @3.3V fixed. • 1- 24/48MHz, @3.3V selectable by I2C (Default is 24MHz) • 3- REF @3.3V, 14.318MHz. Features/Benefits: • Programmable output frequency, divider ratios, output rise/falltime, output skew. • Programmable spread percentage for EMI control. • Watchdog timer technology to reset system if system malfunctions. • Programmable watch dog safe frequency. • Support I2C Index read/write and block read/write operations.
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