ICS9FG104 - Programmable FTG for Differential P4TM CPU

Product Overview

Integrated Circuit Systems

Datasheet Details

Part number	ICS9FG104
Manufacturer	Integrated Circuit Systems
File Size	206.32 KB
Description	Programmable FTG for Differential P4TM CPU
Datasheet	ICS9FG104 Datasheet
Additional preview pages of the ICS9FG104 datasheet.

Product details

Description

PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 PIN NAME XIN/CLKIN X2 VDD GND REFOUT FS2 DIF_3 DIF_3# VDD GND DIF_2 DIF_2# SDATA SCLK DIF_STOP# SPREAD SEL14M_25M# DIF_1# DIF_1 GND VDD DIF_0# DIF_0 FS1 FS0 IREF PIN TYPE IN OUT PWR IN OUT IN OUT OUT PWR PWR OUT OUT I/O IN IN IN IN OUT OUT PWR PWR OUT OUT IN IN OUT PWR PWR DESCRIPTION Crystal input or Reference Clock input Crystal output, Nominally 14.318MHz Power supply, nominal 3.3V Ground pin.

Features

VDD 3.
Generates common CPU frequencies from 14.318 GND 4 MHz or 25 MHz REFOUT 5.
Crystal or reference input FS2 6.
4 - 0.7V current-mode differential output pairs DIF_3 7.
Supports Serial-ATA at 100 MHz DIF_3# 8 VDD 9.
Two spread spectrum modes: 0 to -0.5 downspread and +/-0.25% centerspread GND 10 DIF_2 11.
Unused inputs may be disabled in either driven or HiZ state for power management. DIF_2# 12.
M/N Programming SDATA 13 SCLK 14.

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Published: Jun 17, 2006 |