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ICS9FG108 Datasheet Programmable FTG for Differential P4 CPU

Manufacturer: Integrated Circuit Systems

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Datasheet Details

Part number ICS9FG108
Manufacturer Integrated Circuit Systems
File Size 218.58 KB
Description Programmable FTG for Differential P4 CPU
Download ICS9FG108 Download (PDF)

General Description

PIN # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 PIN NAME XIN/CLKIN X2 VDD GND REFOUT FS2 OE_7** DIF_7 DIF_7# VDD DIF_6 DIF_6# OE_6* VDD

Overview

www.DataSheet4U.com Integrated Circuit Systems, Inc.

ICS9FG108 Programmable FTG for Differential P4TM CPU, PCI-Express & SATA Clocks Recommended Application: Pin Configuration XIN/CLKIN X2 VDD GND REFOUT FS2 OE_7**.

Key Features

  • Generates common frequencies from 14.318 MHz or 25 MHz.
  • Crystal or reference input.
  • 8 - 0.7V current-mode differential output pairs.
  • Supports Serial-ATA at 100 MHz.
  • Two spread spectrum modes: 0 to -0.5 downspread and +/-0.25% centerspread.
  • Unused inputs may be disabled in either driven or HiZ state for power management.
  • Programmable OE Polarity.
  • M/N Programming Key Specifications:.
  • Output cycle-to-cycle jitter <.

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