Part M2020
Description VCSO BASED CLOCK PLL
Manufacturer Integrated Circuit Systems
Size 431.78 KB
Integrated Circuit Systems

M2020 Overview

Description

The M2020/21 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for optical network systems supporting 2.5-10 GB data rates.

Key Features

  • Integrated SAW (surface acoustic wave) delay line; low phase jitter of < 0.5ps rms, typical (12kHz to 20MHz or 50kHz to 80MHz)
  • Output frequencies of 15 to 700 MHz *
  • LVPECL clock output (CML and LVDS options available)
  • Reference clock inputs support differential LVDS, LVPECL, as well as single-ended LVCMOS, LVTTL
  • Loss of Lock (LOL) output pin
  • Narrow Bandwidth control input (NBW pin)
  • Industrial temperature grade available
  • Single 3.3V power supply