MK1491-06F Datasheet PDF - Integrated Circuit Systems CS5530 Geode Clock Source Specs

MK1491-06F - CS5530 Geode Clock Source

This page provides the datasheet information for the MK1491-06F, a member of the MK1491-06 CS5530 Geode Clock Source family.

Datasheet Summary

Description

The MK1491-06 is a low cost, low jitter, high performance clock synthesizer for National Semiconductor CS5530 based computer and portable appliance applications.

Using patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 14.318 MHz crystal input to produce multiple output clocks.

Features

Packaged in 28 pin, 300 mil wide SOIC or in 28 pin, 150 mil wide SSOP.
Provides all critical timing for the National Semiconductor CS5530 Geode companion chip.
Four PCI clocks.
Selectable PCIF on up to 2 outputs.
Early PCI clock selectability.
Up to 4 Reference clocks.
48 MHz USB and 24MHz SIO support.
AC97 audio clock.
Multiple power down modes.
Low EMI Enable pin reduces EMI radiation.

Datasheet Details

Part number	MK1491-06F
Manufacturer	Integrated Circuit Systems
File Size	88.91 KB
Description	CS5530 Geode Clock Source
Datasheet	MK1491-06F Datasheet
Additional preview pages of the MK1491-06F datasheet.

📁 Similar Datasheet

MK1493-02A - Networking/pci Clock Generator (Integrated Circuit System)

MK1417 - S3 Notebook Clock Source (MicroClock)

MK1417S - S3 Notebook Clock Source (MicroClock)

MK1417STR - S3 Notebook Clock Source (MicroClock)

MK1040VP - High Power RF LDMOS FET (Innogration)

MK10DN128VFM5 - Microcontroller (Freescale Semiconductor)

MK10DN32VFM5 - Microcontroller (Freescale Semiconductor)

MK10DN64VFM5 - Microcontroller (Freescale Semiconductor)

MK10DX128VFM5 - Microcontroller (Freescale Semiconductor)

MK10DX32VFM5 - Microcontroller (Freescale Semiconductor)

Full PDF Text Transcription

Click to expand full text

Description The MK1491-06 is a low cost, low jitter, high performance clock synthesizer for National Semiconductor CS5530 based computer and portable appliance applications. Using patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 14.318 MHz crystal input to produce multiple output clocks. It provides selectable PCI local bus and AC97 audio clocks, 24 MHz and 48 MHz clocks for Super I/O and USB, as well as multiple Reference outputs. The device has multiple power down modes to reduce power consumption.

Published: Mar 15, 2018 |